The present invention relates to voltage repeater circuits, and in particular to a voltage repeater circuit with low harmonic distortion for loads with a resistive component of a value which is not very high, particularly suitable for incorporation in a monolithically integrated circuit constructed using MOS (Metal Oxide Semiconductor) technology.
It is often necessary in a circuit to apply a voltage supplied by a high output impedance signal voltage generator to a load with a resistive component whose value is not very high (for example a few k.OMEGA.). In some applications, moreover, in order to drive the resistive component of the load correctly, it is necessary to be able to supply the latter with a current which may have a high swing when a signal voltage is applied to the load itself.
In order to satisfy this requirement, a voltage repeater circuit is generally interposed between the signal voltage generator and the load. The repeater circuit repeats the input signal voltage as its output and has a high input impedance and a low output impedance, thereby achieving the required impedance decoupling between the voltage generator and the load.
Voltage repeater circuits are used, for example, in complex circuit structures in monolithically integrated circuits.
The essential requirements of a voltage repeater circuit of this type are:
substantially unity voltage gain; PA0 a low output impedance; PA0 the ability to supply all of the continuous and signal currents required to drive the resistive component of the load correctly; PA0 maximum reduction of the harmonic distortion introduced into the output signal, even in the presence of output signals with a high current swing. PA0 low integration area occupation; PA0 ease of insertion within more complex circuit structures; PA0 limited power dissipation with a high speed of response. PA0 in some types of applications, in particular if the load resistance R.sub.L is a few k.OMEGA., the ouptut impedance of the circuit (equal, as mentioned above, to 1/g.sub.m) may not be low enough to ensure a voltage gain value for the repeater circuit which is sufficiently close to unity; PA0 if there is a high swing in the input signal voltage (and therefore in the output signal voltage), the value of the total current absorbed by the load varies considerably with variations in the value of the signal voltage. If the load resistance R.sub.L has a low value, there is an appreciable variation in the current which passes through the transistor, and thus in the value of the transconductance of the latter, with variations in the value of the voltage supplied as output (it is known, in fact, that the transconductance of the MOS-type field effect transistor operating in the saturation range is proportional to the square root of the current passing through the transistor). The voltage gain of this circuit therefore varies with variations in the voltage supplied as output, which leads to the introduction of harmonic distortion into the output signal.
Other very important requirements, particularly for some applications, are as follows:
A known voltage repeater circuit, generally known as a unity gain non-inverting "buffer" comprises an open loop high voltage gain operational amplifier A which has its output terminal and its inverting input terminal connected together. The non-inverting input terminal and the output terminal of the operational amplifier respectively form the input terminal and the output terminal of the voltage repeater circuit. The voltage gain of this circuit, as is known to those skilled in the art, is equal to A/(1+A). As a result thereof, if the value of A is sufficiently high (i.e. if A&gt;&gt;1), the voltage gain is substantially equal to 1.
The output impedance of the voltage repeater circuit is equal to the output impedance of the open loop operational amplifier divided by the factor (1+A). Using an operational amplifier with a high open loop voltage gain and an open loop output impedance which is not excessively high, for example, a normal amplifier of the type with two voltage gain stages in cascade, the output impedance of the voltage repeater circuit is thus extremely low.
If use is made of an operational amplifier able to drive the resistive component of the load correctly, and in particular able to supply the current required by the latter as an output, the resultant circuit also satisfies the third and the fourth requirements listed above. For this purpose, use is generally made of an operational "power" amplifier, where the term power is added to show that the operational amplifier is able to adequately drive loads with a resistive component which does not have a high value. This type of amplifier in general contains a suitably designed output stage (see, for example, "MOS Operational Amplifier Design - A Tutorial Overview" by P. R. Gray and R. G. Meyer, in IEEE Journal of Solid-State Circuits, Vol. SC-17, No. 6, December 1982, pp. 969-982, Para. VII, and "Large Swing CMOS Power Amplifier" by K. E. Brehmer and J. B. Wieser in IEEE Journal of Solid-State Circuits, Vol. SC-18, No. 6, December 1983, pp. 624-629). An amplifier whose output stage is not designed in a suitable way is not able to supply a continuous output current of appreciable value without its open loop voltage gain being reduced to a comparatively low value.
If use is made of an operational amplifier which comprises two voltage gain stages in cascade and, in general, an additional power output stage, it is possible thus to obtain a voltage repeater circuit which adequately satisfies the first four requirements set out above. The fact that the amplifier comprises two gain stages, however, entails a considerable integration area occupation by the voltage repeater circuit, since it is also necessary to insert within the amplifier a compensation capacitor, which may be of relatively high value, to improve the overall stability of the system. The additional power output stage also increases the integration area occupation.
The power dissipation of this circuit structure may then be excessive, given that there are various circuit "branches" which absorb supply current in a two-stage operational amplifier. It should be borne in mind, in this respect, that the presence of the compensation capacitor must also be taken into account in dimensioning the biasing currents of the amplifier stages in order to obtain an adequate speed of response. The power output stage also requires a further absorption of supply current.
This circuit is, finally, difficult to insert within more complex monolithically integrated circuit structures.
A further known voltage repeater circuit is the so-called source follower.
This circuit substantially comprises as its active component a suitably biased MOSFET transistor which operates in the saturation range. The gate electrode and the source electrode of the transistor respectively form the input terminal and the output terminal of the repeater circuit. A load R.sub.L, assumed for the sake of simplicity to be purely resistive, may be inserted between the output terminal and a reference terminal (for example the ground terminal, if the transistor is an N channel MOSFET).
As is known to persons skilled in the art, if the transconductance g.sub.m of the transistor is much greater than the reciprocal of its output resistance, for the point of view of the signal, this circuit, for signal frequencies lower than its cut-off frequency, is substantially equivalent to a voltage generator having a voltage value equal to the signal voltage applied to the input and having in series a resistance which is roughly equal to the reciprocal of the transconductance g.sub.m of the transistor. The voltage gain of the circuit is therefore approximately equal to R.sub.L /(R.sub.L +1/g.sub.m). If the transconductance g.sub.m of the transistor is much greater than the reciprocal of the load resistance R.sub.L, the source follower circuit substantially has unity voltage gain.
The voltage repeater circuit obtained in this way has, however, the following drawbacks:
In order to obtain a lower value than that which may be obtained with the conventional source follower circuit described above for the output impedance of the voltage repeater circuit, and therefore to obtain a circuit with a voltage gain which is even closer to unity, use may be made of a more complex known circuit structure, shown in FIG. 1.
The circuit comprises a first N channel MOSFET transistor M1 and a second P channel MOSFET transistor M2. The gate electrode of the transistor M1 forms an input terminal IN of the voltage repeater circuit.
The drain electrode of the transistor M1 and the gate electrode of the transistor M2 are connected together in a first circuit node D1 which is connected to the positive terminal V.sub.DD of a voltage supply via a first constant current generator I.sub.B1.
The source electrode of the transistor M1 and the drain electrode of the transistor M2 are connected together in a second circuit node which is connected to the negative terminal V.sub.SS of the voltage supply via a second constant current generator I.sub.B2. This circuit node forms an output terminal OUT of the voltage repeater circuit.
The source electrode of the transistor M2 is connected to the positive terminal V.sub.DD.
The substrate electrode of the transistor M1 is directly connected to its source electrode.
A load R.sub.L, of a purely resistive type for the purposes of illustration, is inserted between the output terminal OUT and the negative terminal V.sub.SS.
The two constant biasing current generators I.sub.B1 and I.sub.B2 are constructed using techniques known to those skilled in the art: the values of the currents which they supply are correlated and are such as to suitably bias the two transistors M1 and M2 which operate in the saturation range.
FIG. 1 also shows a capacitor C.sub.C connected between the circuit node D1 and the negative terminal V.sub.SS which may possibly be necessary for frequency compensation. This capacitor has a fairly small value of a very few pF. In the description of the operation of the circuit which follows and which relates to signal frequencies lower than the cut-off frequency of the circuit, the effects of this capacitor will be disregarded.
When a voltage to be repeated V.sub.in is supplied between the input terminal IN and the negative terminal V.sub.SS, an output voltage V.sub.out is supplied by the repeater circuit between the output terminal OUT and the negative terminal V.sub.SS.
The two transistors M1 and M2 and the load resistance R.sub.L are traversed by currents which are indicated in FIG. 1 by I.sub.1, I.sub.2 and I.sub.out respectively.
FIG. 2a shows the equivalent circuit for a small signal of the circuit of FIG. 1. This circuit is obtained by substituting its equivalent circuit for each of the components of the circuit structure of FIG. 1. Each of the two MOSFET transistors is replaced by a circuit formed by the parallel connection of the output resistance of the transistor and a voltage controlled current generator which supplies, in the drain-source direction with an input direction into the source electrode, a current whose value is equal to the product of the transconductance of the transistor and the signal voltage present between the gate electrode and the source electrode of the transistor itself. Each of the two constant biasing current generators, considered to be real, is replaced by its own equivalent output resistance. In FIG. 2a account has in contrast been taken of the fact that, from the point of view of the signal, the two terminals of the voltage supply are considered to be a short circuit. In accordance with the above, in this equivalent circuit the compensation capacitor C.sub.C has been disregarded. The load resistance R.sub.L is inserted between the output terminal OUT and the negative terminal V.sub.SS.
In FIG. 2a, v.sub.gs1, g.sub.m1 and r.sub.ds1 respectively indicate the signal voltage between the gate electrode and the source electrode, the transconductance and the output resistance of the transistor M1; v.sub.gs2, g.sub.m2 and r.sub.ds2 respectively indicate the signal voltage between the gate electrode and the source electrode, the transconductance and the output resistance of the transistor M2 and r.sub.k1 and r.sub.k2 respectively indicate the output resistance of the constant biasing current generator I.sub.B1 and that of the generator I.sub.B2 ; v.sub.in and v.sub.out respectively indicate the input signal voltage and the output signal voltage; i.sub.out indicates the output signal current which passes through the load resistance R.sub.L : this obviously produces i.sub.out =v.sub.out /R.sub.L.
Applying Thevenin's theorem, the equivalent circuit of FIG. 2a is converted into the circuit shown in FIG. 2b, in which the equivalent circuit of the voltage repeater circuit is replaced by a real signal voltage generator v.sub.s having an output resistance r.sub.out.
If g.sub.m1 &gt;&gt;1/r.sub.ds1, simple calculations provide v.sub.s .perspectiveto.v.sub.in.
The calculation of the output resistance of the circuit r.sub.out may be carried out, with reference to FIG. 2a, by supplying a voltage v.sub.x between the output terminal OUT and the negative terminal V.sub.SS and calculating the current i.sub.x which enters the voltage repeater circuit via the output terminal, assuming that the input terminal IN is connected to a fixed potential (v.sub.in =0). This produces, by definition: EQU r.sub.out .tbd.v.sub.I /i.sub.I ( 1)
Obviously, v.sub.gs1 =-v.sub.x, given that the gate electrode of the transistor M1 is assumed to be connected to a fixed potential.
It is now necessary to calculate the signal voltage v.sub.gs2. If the signal current passing through the resistance r.sub.k1 is called i.sub.k1, this produces: ##EQU1## in which r*.sub.d .tbd.r.sub.ds1 r.sub.k1 /(r.sub.ds1 +r.sub.k1) is the resistance equivalent to the parallel connection of r.sub.ds1 and r.sub.k1.
If g.sub.m1 &gt;&gt;1/r.sub.ds1, this produces: EQU V.sub.gs2 .perspectiveto.V.sub.I G.sub.m1 r*.sub.d ( 6)
Thus, disregarding the currents passing through r.sub.ds1 and r.sub.ds2 with respect to the currents g.sub.m1 v.sub.gs1 and g.sub.m2 v.sub.gs2, and also disregarding the current passing through the resistance r.sub.k2, the following is produced: EQU i.sub.I .perspectiveto.-g.sub.m1 v.sub.gs1 +g.sub.m2 v.sub.gs2 .perspectiveto.g.sub.m1 v.sub.I +g.sub.m2 g.sub.m1 r*.sub.d v.sub.I =g.sub.m1 (1+g.sub.m2 r*.sub.d)v.sub.I ( 7)
which finally provides: ##EQU2##
With respect to the simple source follower circuit described above, the circuit of FIG. 1 therefore has an output resistance which is lower by a factor (1+g.sub.m2 r*.sub.d), which, with a normal dimensioning of the circuit (g.sub.m2 &gt;&gt;1/r*.sub.d) is approximately equal to g.sub.m2 r*.sub.d. The voltage gain of the circuit, which is substantially equal to R.sub.L /(R.sub.L +r.sub.out) is consequently fairly close to unity even in the presence of load resistances of relatively low value.
The value of the harmonic distortion introduced into the output signal, however, although reduced with respect to the case of the simple source follower circuit, is still not at an optimum value. The value of the current I.sub.1 which passes through the transistor M1 is equal to the current supplied by the constant current generator I.sub.B1, as a result of which the value of the transconductance g.sub.m1 remains constant and does not depend on the voltage value V.sub.out supplied as output. The value of r*.sub.d does not depend either on the value of the voltage supplied as output, given that neither r.sub.k1 nor r.sub.ds1 depend thereon. In the presence of wide voltage swings in the output signal, however, the value of the current I.sub.out which passes through the load resistance R.sub.L varies greatly as a function of the voltage itself. Given that the entire signal current i.sub.out which passes through the output resistance passes through the transistor M2 (which in fact gives I.sub.2 =I.sub.out +I.sub.B2 -I.sub.1), if the value of the load resistance R.sub.L is not very high, the value of the current I.sub.2 which passes through the transistor M2 varies substantially with variations in the voltage V.sub.out and as a result of which the value of the transconductance g.sub.m2 and therefore the value of r.sub.out vary as a function of the latter. The voltage gain of the circuit structure of FIG. 1 therefore varies with variations in the value of the voltage supplied as output and harmonic distortion is consequently introduced into the output signal.
In order to reduce the harmonic distortion in the output signal, it would be possible to bias the circuit in such a way that the rest value of the current I.sub.2 is much higher than the maximum output signal current i.sub.out in order to make the variations to which the transconductance g.sub.m2 is subject when the voltage supplied as output by the circuit varies, negligible. This would lead, however, in the presence of loads with a resistive component of relatively low value, to an excessive power dissipation by the circuit and would not, therefore, be an ideal solution.